Architecture of a Novel High Performance Traffic Capturing Device Based on the Intel IXP2400 Network Processor
نویسندگان
چکیده
The extensive availability of cost effective commodity PC hardware pushed the development of flexible and versatile traffic monitoring software such as protocol analyzers, protocol dissectors, traffic sniffers, traffic characterizers and IDSs (Intrusion Detection Systems). The largest part of these pieces of software is based on the well known libpcap API, which in the last few years has become a de facto standard for PC based packet capturing. Many improvements have been applied to this library but it still suffers from several performance flaws; these flaws are not generated by the software itself but by the underlying hardware bottlenecks. In this paper we present the architecture and the implementation design of a new traffic monitoring device, implemented by an Intel IXP2400 network processor PCI-X card connected to a gigabit ethernet LAN hosting a cluster of common personal computers running any libpcap based application. Since this is mainly an architectural work, only very preliminary experimental results are presented, while every design choice is justified from a theoretical point of view.
منابع مشابه
Scalable DiffServ-over-MPLS Traffic Engineering with Per-flow Traffic Policing
This paper proposes a DiffServ-over-MPLS Traffic Engineering (TE) architecture and describes the implementation of its functional blocks on Intel IXP2400 Network Processor using Intel IXA SDK 4.1 framework. We propose fast and scalable 6-tuple range-match classifier, which allows traffic policing procedures to operate on per-flow level, and a scalable low-jitter Deficit Round Robin (DRR) schedu...
متن کاملDesign of a novel congestion-aware communication mechanism for wireless NoC architecture in multicore systems
Hybrid Wireless Network-on-Chip (WNoC) architecture is emerged as a scalable communication structure to mitigate the deficits of traditional NOC architecture for the future Multi-core systems. The hybrid WNoC architecture provides energy efficient, high data rate and flexible communications for NoC architectures. In these architectures, each wireless router is shared by a set of processing core...
متن کاملTTSS Packet Classification Algorithm to enhance Multimedia Applications in Network Processor based Router
The objective of this paper is to implement the Trie based Tuple Space Search(TTSS) packet classification algorithm for Network Processor(NP) based router to enhance multimedia applications. The performance is evaluated using Intel IXP2400 NP Simulator. The results demonstrate that, TTSS has better performance than Tuple Space Search algorithm and is well suited to achieve high speed packet cla...
متن کاملRun-Time Adaptive Processor Allocation of Self-Configurable Intel IXP2400 Network Processor
An ideal Network Processor, that is, a programmable multi-processor device must be capable of offering both the flexibility and speed required for packet processing. But current Network Processor systems generally fall short of the above benchmarks due to traffic fluctuations inherent in packet networks, and the resulting workload variation on individual pipeline stage over a period of time ult...
متن کاملAM-Trie: A High-Speed Parallel Packet Classification Algorithm for Network Processor
Nowadays, many high-speed Internet services and applications require high-speed multidimensional packet classification, but current high-speed classification often use expensive and power-slurping hardware (such as TCAM and FPGA). In this paper, we present a novel algorithm, called AM-Trie (Asymmetrical Multi-bit Trie). Our algorithm creatively use redundant expression to shorten the height of ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2007